Conveyor belts for qubits: a blueprint for fast, low-overhead error correction in silicon
Preprint, not yet peer-reviewed | Proposal
It is the first design, by the author’s account, that fits high-rate qLDPC codes onto the fixed shuttling tracks of silicon spin qubits and works out cycle times and thresholds end to end.
Our understanding
![Slide 4: 1,400 data qubits carry 280 logical ones. The largest code from the search, [[1400, 280, at most 28]]. With helper qubits, about 2,500 qubits in total. Distance at most 28. A block of 1,400 grey dots labelled data qubits with an arrow to a block of 280 blue dots.](../img/series/nest-qldpc-spin-shuttling/s4.webp)
Some of the most efficient ways to protect quantum information need qubits that sit far apart to compare notes. In silicon chips, qubits can be moved quickly, but only along fixed tracks. This design lays the tracks out as conveyor belts inside conveyor belts, so whole rows of qubits move together and meet the right partners. By the design’s timing estimate, one full round of checks takes less than 50 millionths of a second, hundreds to thousands of times faster than with neutral atoms. The simulations assume qubits that move with fewer errors than in today’s best devices. It is a blueprint. Nothing has been built yet.
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The details
Key number: Threshold above 10⁻³ in circuit-level simulations of codes up to [[480, 96, ≤ 16]], with shuttling noise at most a tenth of the gate error
What they did
Quantum low-density parity-check (qLDPC) codes can protect many logical qubits with few physical ones, with encoding rates up to 50 % at useful distances. Their checks connect qubits that are far apart, and so far neutral atoms have supplied that connectivity. The paper proposes doing it with silicon spin qubits, which can be shuttled along fabricated tracks in microseconds rather than milliseconds, but only along fixed paths without collisions. The design, NeST (Nested Shuttling Tracks), arranges nested conveyor-belt loops on a square lattice so that every required permutation becomes a rigid, globally controlled motion of whole trains of qubits. A code search finds rate-20 % codes up to [[1400, 280, ≤ 28]], where the distance of the largest code is only an upper bound. Circuit-level simulations of the four smallest codes give thresholds above 10⁻³. In these simulations the shuttling noise is at most a tenth of the gate error, which for a 0.1 % machine is five times lower than the best shuttling demonstrated so far. The estimated stabiliser cycle takes 16 to 30 μs for the routed codes and about 42 μs, a worst-case estimate, for the largest one. The paper puts this at two to three orders of magnitude faster than neutral-atom implementations. For a [[150, 30, 10]] code the author builds a code-surgery gadget that needs no more qubits than the unconstrained gadget it replaces, at the cost of 40 instead of 31 gate layers (29 % more). The gadget was verified without noise.
Why it matters
It is the first co-design of a qLDPC code family and spin-qubit hardware, according to the author, and it argues that very low overhead and a fast clock need not be traded against each other. All of this is design and simulation. Nothing has been built, and the paper is a preprint.
What is still open
The headline estimate of 10⁻¹⁴ logical errors per qubit per round is an extrapolation. It assumes shuttling ten times better than early demonstrations and other errors at 0.1 %. The largest code was not simulated, and the author notes that the extrapolation ignores shuttling noise growing with code size. Thresholds at today’s shuttling quality are not simulated in the paper.
The authors note: “third and most importantly, this ignores the fact that the noise here scales with the code size” (Section IV.4.3)
